[1]
基于射频CMOS工艺的频率综合器系统设计与模块电路设计，主要包括以下几个方面：
1.整数/小数频率综合器系统设计、性能指标分配和噪声优化
2.快速锁定频率综合器的研究
3.小数频率综合器量化噪声抑制的研究
4.低功耗压控振荡器和低功耗分频器的研究
5.宽带压控振荡器中Kvco线性化技术的研究
6.高性能电荷泵设计
基于射频CMOS工艺的射频接收机设计（信号通路）
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[1] An 18.1 mW 50 MHz-BW 76.4 dB-SNDR CTSDM With PVT-Robust VCO Quantizer and Latency-Free Background-Calibrated DAC, IEEE TRANSACTIONS ON
2022/12/01
- [2] A Power-Efficient CMOS Image Sensor with In-Sensor Processing and In-Pixel Gain Calibration, 2022 IEEE 65th Inter 2022/08/01
- [3] A Harmonic Rejecting N-Path Filter with Harmonic Gain Calibration Technique, CIRCUITS SYSTEMS AND 2022/07/01
- [4] A Fast-Settling Phase-Locked Loop Utilizing Cycle-Slipping-Elimination PFDCP, IEEE TRANSACTIONS ON 2022/10/01
- [2] A Power-Efficient CMOS Image Sensor with In-Sensor Processing and In-Pixel Gain Calibration, 2022 IEEE 65th Inter 2022/08/01
- [1] 北斗导航与位置服务关键技术及其产业化 2016
- [2] no 2020