Language :
中文
周健军
Home
Scientific Research
Research Field
Paper Publications
Patents
Published Books
Research Projects
Teaching Research
Teaching Resources
Teaching Information
Teaching Achievement
Awards and Honours
Admission Information
Student Information
My Album
Blog
MOBILE Version
Paper Publications
Current position:
Home
>
Scientific Research
>
Paper Publications
[1] A Reconfigurable 28/56 Gb/s PAM4/NRZ Dual-mode SerDes with Hardware-reuse 2018,
[2] Comparator Offset Immune I/Q Calibration Technique for Direct Conversion Receiver IEEE Microwave and Wireless Components Letter, 2019,
[3]zhoujianjun. A high speed, high conversion gain RF envelope detector for SRO-receivers Midwest Symposium on Circuits and Systems, 2019,
[4] A 0.25-dB-Step, 68-dB-Dynamic Range Analog Baseband With Digitally Assisted DCOC and AGC for Multi-Standard TV Applications IEEE Transactions on Circuits and Systems II: Express Briefs , 2019,
[5] A PVT Compensated Ring VCO with FVC-Assisted Digital Background Calibration 2019,
[6] Fully Configurable Capacitor-Less Oversampling DC Offset Cancellation for Direct Conversion Receivers IEEE Transactions on Circuits and Systems II-Express Briefs, 2019,
[7] A 16/32 Gb/s Dual-Mode Transmitter with Eye Level Pre-Distortion in 22nm CMOS FDSOI 2019,
[8]zhoujianjun. A Ka-band quadrature-hybrid LNA-PS with Gm-boosting technique in 40-nm CMOS 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021,
[9]zhoujianjun. A phase domain excess loop delay compensation technique with latency optimized phase selector for VCO-based continuous-time ΔΣ ADC 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021,
[10] A Multi-modulus Fractional Divider with TDC Free Calibration Scheme for Mitigation of TX-VCO Pulling IEEE Transactions on Circuits and Systems II: Express Briefs, 2020,
[11] An ISM Band High-Linear Current-Reuse Up-Conversion Mixer with Built-in-Self-Calibration for LOFT and I/Q Imbalance IEEE Transactions on Circuits and Systems II: Express Briefs, 2020,
[12]zhoujianjun. A blind digital background calibration for all-digital VCO-based ADC ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2018,
[13]zhoujianjun. A low-cost digital-domain foreground calibration for high resolution SAR ADCs MICROELECTRONICS, 2018,
[14]zhoujianjun. 160 MS/s 20 MHz bandwidth third-order noise shaping SAR ADC ELECTRONICS LETTERS, 2018,
[15] A Wideband Simplified Transformer-based VCO with Digital Amplitude Calibration 2017,
total31 2/3
first
previous
next
last
Page
沪ICP备05052060 版权所有©上海交通大学
Click: